By Boris Murmann
With the arrival of robust electronic sign processing in moveable digital functions, we've seen a transforming into, unhappy call for for energy effective, high-speed and high-resolution analog-to-digital converters (ADCs). whereas know-how scaling has ended in innovative profits in electronic computing strength and effort potency, development in analog-to-digital conversion interfaces has been relatively sluggish. Digitally Assisted Pipeline ADCs: concept and Implementation explores the chance to minimize ADC energy dissipation via leveraging electronic sign processing services in superb line built-in circuit know-how. The defined digitally assisted pipelined ADC makes use of a statistics-based approach id procedure as an permitting aspect to switch precision residue amplifiers with easy open-loop achieve levels.
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Extra resources for Digitally Assisted Pipeline ADCs: Theory and Implementation
Flash ADC energy as a function of sampling rate (assuming improving mismatch factors AVT, and AE with technology). 2 Figure 3-12. Estimated flash ADC energy versus feature size (from speed trajectory in Figure 3-11). 4 Flash ADC Performance Trends It is interesting to compare the result above to published performance data. The data summarized in Table 3-1 is plotted in Figure 3-13 against feature size. Here, we compare only flash ADCs with a fixed resolution of 6 bits, and hence use FOM3 as defined in equation (2-5).
In FOM2, the tradeoff between precision and power is controversial. Equation (2-3) suggests that the power consumption of an ADC should double for each added bit. However, assuming that the ADC is limited by kT/C thermal noise, adding an extra bit requires quadrupling the effective capacitance in the converter. This in turn, requires a 4x increase in current and power dissipation to maintain the same speed. Based on this argument, some authors use a figure of merit in which the denominator carries the precision as 22ENOB.
In the following sections we use (2-1) and (2-3) for a more general trend survey on the impact of technology scaling on ADCs of all variants. 2 ADC Throughput Figure 2-1 illustrates the trend in ADC throughput since 1987. The performance data for this survey origins from 1, augmented with additional data from the International Solid-State Conference (ISSCC) from the years 1999-2003. Each data point in Figure 2-1 corresponds to a specific, single ADC reported in the respective year. 5 years.
Digitally Assisted Pipeline ADCs: Theory and Implementation by Boris Murmann